DrTeerachot Siriburanon

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The 2025 Symposium on VLSI Technology and Circuits is a premiere international conference that records the pace, progress, and evolution of micro/nano integrated electronics. The Best Student Paper Finalists have been selected based on the quality to encourage the research of student projects which will lead the next generation. Awarded to Feifan Hong, Jiawen Chen, Pingda Guan, Sayan Kumar, Robert B. Staszewski, and Teerachot Siriburanon. Paper Titled: A 24.5-to-45.2-GHz Dual-Injection Clock Multiplier with Folded-Inductor-Based Magnetic-Flux Cancellation Achieving 32.83-fsrms Jitter and 0.037-mm2 Core Area

Awarded to Yevhenii Mormul, Jan Przybyszewski, Teerachot Siriburanon, John Healy and Paul Cuffe for our paper below: "Gauging the Capability of Artificial Intelligence Chatbot Tools to Answer Textbook Coursework Exercises in Circuit Design Education"

Paper titled "Modelling, Data Mapping, and Evaluation of Analog Multiply-And-Accumulate Components in Quantized CNNs" from ME thesis of Fergal Kilgannon

For exceptional contributions to the publications of the IEEE Solid-State Circuits Society

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I was selected by the 2022 Editor-in-Chief of the corresponding journal and are being recognized for their outstanding service to the CASS periodicals through their thoroughness, timeliness, and dedication to ensuring that their periodical maintains and improves their technical quality. This recognition will be given on an annual basis for service recognized during the previous year.

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